Micron Maps Memory Through 2030: HBM6, 400-Layer NAND and 3D DRAM, While Skipping 4F² Chips
Micron unveiled DRAM, HBM and NAND roadmaps through 2030 aimed at AI memory performance, energy efficiency and storage, and its CTO said the company will not pursue 4F² memory chips, per Nikkei.
Micron (MU) unveiled its next-generation DRAM, high-bandwidth memory (HBM) and NAND roadmaps through 2030, widening its focus on AI memory performance, energy efficiency and storage across data centers, personal devices and robotics. Separately, Nikkei reported that Micron's chief technology officer said the company will not pursue 4F² memory chips despite the advance by China's CXMT, and will keep betting on a 6F² structure and next-generation 3D DRAM.
DRAM: a denser 1δ node and 3D DRAM
Micron's 1δ node targets a mid-20% improvement in bit density over 1γ, with U.S. manufacturing ramping in the second half of 2027. Future nodes include 1ε with wafer bonding, advanced EUV processes and 3D DRAM development. Micron projects more than a 10x improvement in DRAM logic performance between 2020 and 2030.
HBM roadmap
| Year | Planned generation |
|---|---|
| 2027 | HBM4E; custom HBM begins with HBM4E |
| 2028 | HBM5 and first-generation vertical HBM (vHBM) |
| 2029 | HBM5E |
| 2030 | HBM6 |
Micron also plans to stack memory directly above computing chips, using advanced packaging, hybrid bonding and thermal innovations to improve bandwidth and the number of AI tokens generated per watt.
NAND and AI storage
Micron's G11 NAND targets more than 400 layers, roughly twice the bit density of G9, up to 1.5x faster I/O and over 25% lower energy per bit. Volume production is planned for the second half of 2027. The company also outlined future SSDs with capacities up to 512TB, and high-IOPS NAND targeting 25 million to 100 million small-block operations per second, designed to keep AI accelerators supplied with data.
Micron said it is targeting AI-optimized storage for data centers, private enterprise AI, workstations, AI PCs, autonomous vehicles, humanoid robots, mobile devices and wearables.
Why it is skipping 4F²
Micron says it is developing 3D DRAM rather than pursuing 4F² scaling because of complexity and cost. Per Nikkei, the CTO said the company will stay with a 6F² structure and next-generation 3D DRAM, even as CXMT advances. The roadmap figures above are Micron's targets and plans, not guarantees, and dates could shift.
Readers also read
Micron Is Stalling on Peak Fears, but Memory Prices Haven't Gotten the Memo
RecapT-Mobile Plunges 13% as SpaceX's Reported $8 Billion Spectrum Deal Rattles AT&T and Verizon
ResearchGoogle Gives Gemini Its Own Email Address and a Job: What the Workplace Agent Means for Alphabet Stock
RecapWeek Ahead: Fed Minutes, Five Fed Speakers and the First Big Earnings of Q3 Season
MarketCatalyst LLC is not a registered investment advisor and does not manage client assets. Content on this platform is provided for informational and educational purposes only. It is not investment advice, and MarketCatalyst is not a stock-picking or trade-alert service. Trading stocks and options involves risk, including the possible loss of principal. Consider your own goals, time horizon, and risk tolerance, and consult a qualified financial advisor before making any investment decision.